Instruction Syntax

Mnemonic	Format	Flags
bcctr	BO,BI	LK = 0
bcctrl	BO,BI	LK = 1

Instruction Encoding

Field	Bits	Description
Primary Opcode	0-5	010011 (0x13)
BO	6-10	Branch Options
BI	11-15	Branch Condition Index
Reserved	16-20	00000
XO	21-30	1000010000 (528)
LK	31	Link Register Update

Operation

cond_ok ← BO[0] | (CR[BI] ≡ BO[1])
if cond_ok then NIA ← CTR[0-29] || '00'
if LK = 1 then LR ← CIA + 4

Branch conditional to count register instruction branches to the address in the count register if the condition is met. The low-order 2 bits of the count register are ignored to ensure word alignment.

Note: The count register is not decremented by this instruction.

Affected Registers

Link Register (LR)

(if LK = 1)

• LR ← CIA + 4 (return address)

For more information on branching see Section 2.3, "Branch Processor," in the PowerPC Microprocessor Family: The Programming Environments manual.

Examples

Jump Table Implementation

lis r5, jump_table@ha    # Load high part of jump table address
addi r5, r5, jump_table@l # Complete jump table address
lwzx r6, r5, r3          # Load target address based on index
mtctr r6                 # Move target to count register
bcctr 20, 0              # Branch unconditionally to target

Function Pointer Call

lwz r4, 0(r3)            # Load function pointer
mtctr r4                 # Move to count register
bcctrl 20, 0             # Call function (saves return address)

Conditional Indirect Branch

cmpwi r3, 0              # Test condition
lwz r4, handler_addr(r0) # Load handler address
mtctr r4                 # Move to count register
bcctr 4, 1               # Branch to handler if condition true

Return from Function

# Typical function return using bctr
mtlr r0                  # Restore link register from r0
bcctr 20, 0              # Return (unconditional branch to LR)

Switch Statement

cmpwi r3, 4              # Check if index is valid
bge default_case         # Branch to default if >= 4
lis r5, case_table@ha    # Load case table address
addi r5, r5, case_table@l
rlwinm r3, r3, 2, 0, 29  # Multiply index by 4
lwzx r4, r5, r3          # Load case handler address
mtctr r4                 # Move to count register
bcctr 20, 0              # Jump to case handler

Related Instructions

b, bc, bclr