fmr
Floating Move Register - FC 00 00 90
fmr
Instruction Syntax
| Mnemonic | Format | Flags |
| fmr | frD,frB | Rc = 0 |
| fmr. | frD,frB | Rc = 1 |
Instruction Encoding
1
1
1
1
1
1
D
D
D
D
D
0
0
0
0
0
B
B
B
B
B
0
0
0
1
0
0
1
0
0
0
Rc
| Field | Bits | Description |
| Primary Opcode | 0-5 | 111111 (0x3F) |
| frD | 6-10 | Destination floating-point register |
| Reserved | 11-15 | 00000 |
| frB | 16-20 | Source floating-point register B |
| Reserved | 21 | 0 |
| XO | 22-30 | 001001000 (72) |
| Rc | 31 | Record Condition Register |
Operation
frD ← frB
The contents of floating-point register frB are copied to floating-point register frD. This is a simple register-to-register move operation that preserves the floating-point value exactly.
Note: This instruction does not modify the floating-point value in any way. It performs a bit-for-bit copy from the source to destination register. No floating-point exception flags are affected except when Rc = 1.
Affected Registers
Floating-Point Status and Control Register (FPSCR)
(if Rc = 1)
- FPRF (Floating-Point Result Flags) - updated to reflect the result
For more information on floating-point status see Section 2.1.4, "Floating-Point Status and Control Register (FPSCR)," in the PowerPC Microprocessor Family: The Programming Environments manual.
Examples
Basic Register Copy
lfd f1, source_value(r0) # Load floating-point value fmr f2, f1 # Copy f1 to f2 stfd f2, destination(r0) # Store copied value
Register Copy with Condition Recording
lfd f3, input_value(r0) # Load input value fmr. f4, f3 # Copy f3 to f4, set FPSCR condition codes # FPSCR condition codes now reflect the copied value
Function Parameter Passing
# Prepare floating-point arguments for function call lfd f1, param1(r0) # Load first parameter lfd f2, param2(r0) # Load second parameter fmr f3, f1 # Copy to argument register f3 fmr f4, f2 # Copy to argument register f4 bl floating_point_function # Call function
Backup and Restore Operations
# Save floating-point registers before operation fmr f20, f1 # Backup f1 to f20 fmr f21, f2 # Backup f2 to f21 fmr f22, f3 # Backup f3 to f22 # Perform operations that modify f1, f2, f3 # ... operations ... # Restore original values fmr f1, f20 # Restore f1 from f20 fmr f2, f21 # Restore f2 from f21 fmr f3, f22 # Restore f3 from f22
Result Preparation
# Prepare function return value lfd f1, calculation_result(r0) # Load calculated result fmr f1, f1 # Ensure result is in f1 (return register) # Note: This example shows concept, actual move would be optimized away
Data Movement in Algorithms
# Bubble sort element swap preparation lfdx f1, r3, r4 # Load array[i] lfdx f2, r3, r5 # Load array[j] # Compare and swap if needed fcmpo cr0, f1, f2 # Compare array[i] with array[j] bge no_swap # Branch if array[i] >= array[j] # Swap elements fmr f0, f1 # temp = array[i] fmr f1, f2 # array[i] = array[j] fmr f2, f0 # array[j] = temp stfdx f1, r3, r4 # Store back array[i] stfdx f2, r3, r5 # Store back array[j] no_swap:
Matrix Operations
# Copy matrix elements for transpose operation lfd f1, matrix_00(r0) # Load matrix[0][0] lfd f2, matrix_01(r0) # Load matrix[0][1] lfd f3, matrix_10(r0) # Load matrix[1][0] lfd f4, matrix_11(r0) # Load matrix[1][1] # Transpose: swap off-diagonal elements fmr f5, f2 # temp = matrix[0][1] fmr f2, f3 # matrix[0][1] = matrix[1][0] fmr f3, f5 # matrix[1][0] = temp
Vector Component Shuffling
# Rearrange vector components (e.g., swizzling) lfd f1, vector_x(r0) # Load X component lfd f2, vector_y(r0) # Load Y component lfd f3, vector_z(r0) # Load Z component # Create new vector: (Y, X, Z) fmr f4, f2 # new_x = old_y fmr f5, f1 # new_y = old_x fmr f6, f3 # new_z = old_z
Conditional Value Assignment
# Conditional assignment based on comparison
lfd f1, value_a(r0) # Load value A
lfd f2, value_b(r0) # Load value B
lfd f3, threshold(r0) # Load threshold
fcmpo cr0, f1, f3 # Compare value A with threshold
blt use_value_b # Branch if A < threshold
fmr f4, f1 # Use value A
b value_selected
use_value_b:
fmr f4, f2 # Use value B
value_selected:
stfd f4, selected_value(r0) # Store selected value
Register Allocation Optimization
# Move values to preferred registers for optimization lfd f10, temp_value1(r0) # Load temporary value 1 lfd f11, temp_value2(r0) # Load temporary value 2 # Move to frequently-used registers for better performance fmr f1, f10 # Move to f1 for frequent access fmr f2, f11 # Move to f2 for frequent access # Now f1 and f2 can be used efficiently in tight loops