lfdx
Load Floating-Point Double Indexed - 7C 00 04 AE
lfdx

Instruction Syntax

Mnemonic Format Flags
lfdx frD,rA,rB -

Instruction Encoding

0
1
1
1
1
1
D
D
D
D
D
A
A
A
A
A
B
B
B
B
B
1
0
0
1
0
1
0
1
1
1
/

Field Bits Description
Primary Opcode 0-5 011111 (0x1F)
frD 6-10 Destination floating-point register
rA 11-15 Source register A
rB 16-20 Source register B
XO 21-30 599 (Extended opcode)
Rc 31 Reserved (0)

Operation

if rA = 0 then EA ← (rB)
else EA ← (rA) + (rB)
frD ← MEM(EA, 8)

A double-precision floating-point value (64 bits) is loaded from memory and placed in floating-point register frD. The effective address is computed by adding the contents of registers rA and rB, or just rB if rA is 0.

Note: This indexed form is essential for array access and dynamic addressing with double-precision data. The effective address should be doubleword-aligned (divisible by 8) for optimal performance. If rA=0, it is treated as the value 0, not the contents of register r0.

Affected Registers

None (load instruction does not affect condition registers).

For more information on floating-point operations see Section 2.1.4, "Floating-Point Status and Control Register (FPSCR)," in the PowerPC Microprocessor Family: The Programming Environments manual.

Examples

Matrix Operations with Dynamic Indexing

# Access matrix elements using computed indices
lis r3, matrix_data@ha
addi r3, r3, matrix_data@l
lwz r4, matrix_width(r0)    # Matrix width
li r5, 2                    # Row index
li r6, 3                    # Column index

# Calculate element address: base + (row * width + col) * 8
mullw r7, r5, r4            # row * width
add r8, r7, r6              # + column
slwi r9, r8, 3              # * 8 (bytes per double)
lfdx f1, r3, r9             # Load matrix[row][col]

Scientific Array Processing

# Process arrays with stride patterns
lis r3, data_array@ha
addi r3, r3, data_array@l
li r4, 16                   # Stride (every 2nd element)
li r5, 10                   # Number of elements

process_loop:
    lfdx f1, r3, r4         # Load strided element
    
    # Apply scientific computation
    bl compute_function     # Process value in f1
    
    add r4, r4, r4          # Double stride for next element
    subi r5, r5, 1          # Decrement counter
    cmpwi r5, 0
    bne process_loop        # Continue processing

Sparse Data Structure Access

# Access sparse matrix using index arrays
lis r3, sparse_values@ha
addi r3, r3, sparse_values@l
lis r4, row_indices@ha
addi r4, r4, row_indices@l
lis r5, col_indices@ha
addi r5, r5, col_indices@l
lwz r6, num_nonzero(r0)     # Number of non-zero elements

sparse_loop:
    lwz r7, 0(r4)           # Load row index
    lwz r8, 0(r5)           # Load column index
    
    # Calculate sparse element offset
    slwi r9, r7, 3          # Convert index to byte offset
    lfdx f1, r3, r9         # Load sparse value
    
    # Process sparse element
    bl process_sparse_element
    
    addi r4, r4, 4          # Next row index
    addi r5, r5, 4          # Next column index
    subi r6, r6, 1          # Decrement counter
    cmpwi r6, 0
    bne sparse_loop         # Continue processing

Digital Signal Processing - FFT

# FFT butterfly operations with indexed access
lis r3, complex_data@ha
addi r3, r3, complex_data@l
lwz r4, fft_size(r0)        # FFT size
li r5, 0                    # Butterfly index

fft_butterfly_loop:
    # Calculate butterfly pair indices
    add r6, r5, r4          # Second element index
    slwi r7, r5, 4          # First element offset (* 16 for complex double)
    slwi r8, r6, 4          # Second element offset
    
    # Load complex pairs
    lfdx f1, r3, r7         # Load real part of first element
    addi r9, r7, 8
    lfdx f2, r3, r9         # Load imaginary part of first element
    
    lfdx f3, r3, r8         # Load real part of second element
    addi r10, r8, 8
    lfdx f4, r3, r10        # Load imaginary part of second element
    
    # Perform butterfly computation
    bl fft_butterfly        # Process complex pairs
    
    addi r5, r5, 1          # Next butterfly
    srwi r11, r4, 1         # Half FFT size
    cmpw r5, r11            # Check if done with stage
    blt fft_butterfly_loop  # Continue butterflies

Financial Time Series Analysis

# Analyze financial data with irregular time stamps
lis r3, price_data@ha
addi r3, r3, price_data@l
lis r4, timestamp_offsets@ha
addi r4, r4, timestamp_offsets@l
lwz r5, num_datapoints(r0)  # Number of data points

analysis_loop:
    lwz r6, 0(r4)           # Load timestamp offset
    lfdx f1, r3, r6         # Load price at timestamp
    
    # Calculate moving average over variable window
    bl calculate_moving_average # Process price data
    
    # Detect trend changes
    bl detect_trend_change
    
    addi r4, r4, 4          # Next timestamp offset
    subi r5, r5, 1          # Decrement counter
    cmpwi r5, 0
    bne analysis_loop       # Continue analysis

3D Graphics Vertex Array

# Process 3D vertices with attribute arrays
lis r3, vertex_positions@ha
addi r3, r3, vertex_positions@l
lis r4, vertex_normals@ha
addi r4, r4, vertex_normals@l
lis r5, vertex_texcoords@ha
addi r5, r5, vertex_texcoords@l
lwz r6, num_vertices(r0)    # Number of vertices

vertex_loop:
    li r7, 0                # Vertex index
    slwi r8, r7, 5          # Vertex offset (* 32 for 4 doubles per vertex)
    
    # Load vertex position (x, y, z, w)
    lfdx f1, r3, r8         # Load x coordinate
    addi r9, r8, 8
    lfdx f2, r3, r9         # Load y coordinate
    addi r10, r8, 16
    lfdx f3, r3, r10        # Load z coordinate
    addi r11, r8, 24
    lfdx f4, r3, r11        # Load w coordinate
    
    # Load vertex normal
    slwi r12, r7, 4         # Normal offset (* 16 for 2 doubles)
    lfdx f5, r4, r12        # Load normal x
    addi r13, r12, 8
    lfdx f6, r4, r13        # Load normal y
    
    # Transform vertex
    bl transform_vertex     # Apply transformation matrices
    
    addi r7, r7, 1          # Next vertex
    cmpw r7, r6             # Check if done
    blt vertex_loop         # Continue processing

Related Instructions

lfd, lfdu, lfdux, stfdx, lfsx, lwzx

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