Instruction Syntax

Mnemonic	Format	Flags
lmw	rD,d(rA)	None

Instruction Encoding

Field	Bits	Description
Primary Opcode	0-5	010110 (0x16)
rD	6-10	Starting destination register
rA	11-15	Base register (can be 0)
d	16-31	16-bit signed displacement

Operation

if rA = 0 then EA ← EXTS(d)
else EA ← (rA) + EXTS(d)
for i = 0 to 31 - rD
    GPR[rD + i] ← MEM(EA + i*4, 4)

Multiple words are loaded from consecutive memory locations starting at the effective address. The effective address is computed by adding the sign-extended displacement to the contents of register rA, or zero if rA is 0. Words are loaded into consecutive registers starting from rD up to r31.

Note: This instruction loads (32 - rD) words from memory. For example, if rD = 5, then registers r5 through r31 (27 registers) will be loaded. The instruction is particularly useful for loading function parameters, local variables, or data structures efficiently.

Affected Registers

• rD through r31: Loaded with consecutive words from memory
• rA: Used as base register (if not 0)

Examples

Example 1: Load function parameters

# Load function parameters from stack
lmw r3, 0(r1)      # Load r3-r31 from stack frame

Example 2: Load local variables

# Load local variables from stack
lmw r14, 8(r1)     # Load r14-r31 from stack offset 8

Example 3: Load array data

# Load array data efficiently
lmw r5, 0(r3)      # Load r5-r31 from array starting at r3

Related Instructions

stmw, lwz, lwzu, lwzx