Instruction Syntax

Mnemonic	Format	Flags
subfe	rD,rA,rB	OE = 0, Rc = 0
subfe.	rD,rA,rB	OE = 0, Rc = 1
subfeo	rD,rA,rB	OE = 1, Rc = 0
subfeo.	rD,rA,rB	OE = 1, Rc = 1

Instruction Encoding

Field	Bits	Description
Primary Opcode	0-5	011111 (0x1F)
rD	6-10	Destination register
rA	11-15	Source register A
rB	16-20	Source register B
OE	21	Overflow Exception
XO	22-29	41 (Extended opcode)
Rc	30-31	Record Condition Register

Operation

rD ← (rB) - (rA) + XER[CA]

The value in rA is subtracted from the value in rB, the carry bit is added, and the result is placed into rD. The carry bit is updated based on the result.

Note: The subfe instruction performs subtraction with extended carry. If OE = 1, overflow exceptions are enabled. If Rc = 1, the condition register is updated.

Affected Registers

Condition Register (CR0 field)

(if Rc = 1)

• LT (Less Than)
• GT (Greater Than)
• EQ (Equal)
• SO (Summary Overflow)

Note: CR0 field may not reflect the infinitely precise result if overflow occurs (see XER below).

XER (Exception Register)

(if OE = 1)

• SO (Summary Overflow)
• OV (Overflow)
• CA (Carry)

For more information on condition codes see Section 2.1.3, "Condition Register," and Section 2.1.5, "XER Register," in the PowerPC Microprocessor Family: The Programming Environments manual.

Examples

Basic Subtraction with Extended Carry

subfe r3, r1, r2     # r3 = r2 - r1 + CA
subfe. r3, r1, r2    # Same as above, but also sets condition register

Simple Arithmetic

# Subtract two values with extended carry and store result
lwz r4, 0(r10)     # Load first value
lwz r5, 4(r10)     # Load second value  
subfe r6, r4, r5     # Subtract values with extended carry

Overflow Detection

subfeo r3, r1, r2    # Subtract with extended carry and overflow exception enabled
# If overflow occurs, an exception is raised

Related Instructions

subf, subfc, subfic, subfme, subfze