Instruction Syntax

Mnemonic	Format	Flags
mr	rA,rS	Rc = 0
mr.	rA,rS	Rc = 1

Instruction Encoding

Field	Bits	Description
Primary Opcode	0-5	011111 (0x1F)
rS	6-10	Source register
rA	11-15	Destination register
rB	16-20	00000 (same as rS)
XO	22-29	444 (Extended opcode)
Rc	30-31	Record Condition Register

Operation

rA ← (rS)

MR copies the value from source register rS to destination register rA.

1. Takes the value from source register rS
2. Copies it to destination register rA
3. Optionally sets condition register if Rc=1

Note: MR is a derived form of the OR instruction with rB=rS (OR rA,rS,rS).

Affected Registers

General Purpose Registers (GPRs)

• rA (Destination register) - Loaded with value from rS

Condition Register (CR0 field)

(if Rc = 1)

• LT (Less Than)
• GT (Greater Than)
• EQ (Equal)
• SO (Summary Overflow)

Examples

Basic Register Move

# Copy value from r3 to r4
mr r4, r3        # r4 = r3
mr. r4, r3       # Same as above, but also sets condition register

Register Preservation

# Save register value before function call
mr r31, r3       # Save r3 in r31
bl some_function # Call function
mr r3, r31       # Restore r3 from r31

Parameter Passing

# Move parameters to expected registers
mr r3, r10       # Move first parameter
mr r4, r11       # Move second parameter
bl target_function

Register Swapping

# Swap two registers using a temporary
mr r0, r3        # Save r3 in r0
mr r3, r4        # r3 = r4
mr r4, r0        # r4 = original r3

Conditional Move

# Move value and check if zero
mr. r3, r4       # Move r4 to r3 and set condition register
beq is_zero      # Branch if result is zero

Register Initialization

# Initialize register to zero
li r3, 0         # Load immediate 0
mr r4, r3        # Copy zero to r4

Related Instructions

or (OR), add (Add), li (Load Immediate), mtlr (Move to Link Register), mflr (Move from Link Register)