neg
Negate - 7C 00 00 D0
neg

Instruction Syntax

Mnemonic Format Flags
neg rD,rA OE = 0, Rc = 0
neg. rD,rA OE = 0, Rc = 1
nego rD,rA OE = 1, Rc = 0
nego. rD,rA OE = 1, Rc = 1

Instruction Encoding

0
1
1
1
1
1
D
D
D
D
D
A
A
A
A
A
0
0
0
0
0
OE
0
0
0
0
0
0
0
0
0
Rc

Field Bits Description
Primary Opcode 0-5 011111 (0x1F)
rD 6-10 Destination register
rA 11-15 Source register
Reserved 16-20 00000
OE 21 Overflow Exception
XO 22-29 208 (Extended opcode)
Rc 30-31 Record Condition Register

Operation

rD ← ¬(rA) + 1

The two's complement of (rA) is placed into rD.

Note: The neg instruction computes the arithmetic negation by taking the two's complement of the source value.

Affected Registers

Condition Register (CR0 field)

(if Rc = 1)

XER (Exception Register)

(if OE = 1)

For more information on condition codes see Section 2.1.3, "Condition Register," and Section 2.1.5, "XER Register," in the PowerPC Microprocessor Family: The Programming Environments manual.

Examples

Basic Negation

neg r3, r1     # r3 = -r1
neg. r3, r1    # Same as above, but also sets condition register

Absolute Value

# Compute absolute value of r1
cmpwi r1, 0    # Compare r1 with 0
bge positive   # If r1 >= 0, skip negation
neg r1, r1     # Negate r1 if it was negative
positive:

Overflow Detection

nego r3, r1    # Negate with overflow exception enabled
# If overflow occurs (e.g., negating -0x80000000), an exception is raised

Related Instructions

subf, addi, addis, fneg

Back to Index