Instruction Syntax

Mnemonic	Format	Flags
stbu	rS,d(rA)	None

Instruction Encoding

Field	Bits	Description
Primary Opcode	0-5	100111 (0x27)
rS	6-10	Source register
rA	11-15	Base register (updated)
SIMM	16-31	Signed immediate offset

Operation

EA ← (rA) + SIMM
(EA) ← (rS)[24:31]
rA ← EA

The effective address is calculated by adding the signed immediate offset to the base register. The least significant byte of the source register is stored at the effective address. The base register is updated with the effective address.

Note: The stbu instruction stores the least significant byte (bits 24-31) of the source register to memory and updates the base register with the effective address.

Affected Registers

General Purpose Registers (GPRs)

• rA (Base register) - Updated with effective address

Memory

• Byte at effective address (EA)

Examples

Basic Store Byte with Update

# Store byte and update base register
stbu r3, 4(r4)     # Store byte at r4 + 4, then r4 = r4 + 4

Array Traversal

# Store bytes in array sequentially
li r4, array       # Load array address
li r5, 0           # Counter
loop:
stbu r3, 1(r4)     # Store byte, increment address
addi r5, r5, 1     # Increment counter
cmpwi r5, 10       # Check if done
blt loop

String Copy

# Copy string using auto-increment
li r4, source      # Source string address
li r5, dest        # Destination string address
copy_loop:
lbz r6, 0(r4)      # Load byte from source
stbu r6, 1(r5)     # Store byte to dest, increment dest
cmpwi r6, 0        # Check for null terminator
bne copy_loop

Related Instructions

stb, stbux, stbx, lbzu