Instruction Syntax

Mnemonic	Format	Flags
stbux	rS,rA,rB	None

Instruction Encoding

Field	Bits	Description
Primary Opcode	0-5	011111 (0x1F)
rS	6-10	Source register
rA	11-15	Base register (updated)
rB	16-20	Index register
Reserved	21-29	000000000
Reserved	30-31	00

Operation

EA ← (rA) + (rB)
(EA) ← (rS)[24:31]
rA ← EA

The effective address is calculated by adding the base register to the index register. The least significant byte of the source register is stored at the effective address. The base register is updated with the effective address.

Note: The stbux instruction stores the least significant byte (bits 24-31) of the source register to memory and updates the base register with the effective address.

Affected Registers

General Purpose Registers (GPRs)

• rA (Base register) - Updated with effective address

Memory

• Byte at effective address (EA)

Examples

Basic Store Byte with Update Indexed

# Store byte using indexed addressing with update
stbux r3, r4, r5    # Store byte from r3 at r4 + r5, then r4 = r4 + r5

Array Access with Index

# Store byte in array using index register
li r4, array        # Load array base address
li r5, 0            # Index = 0
stbux r3, r4, r5    # Store byte, update base address

String Processing

# Copy string with indexed addressing
li r4, source       # Source string address
li r5, dest         # Destination string address
li r6, 0            # Index = 0
copy_loop:
lbz r7, 0(r4)       # Load byte from source
stbux r7, r5, r6    # Store byte to dest, update dest address
cmpwi r7, 0         # Check for null terminator
bne copy_loop

Related Instructions

stb, stbu, stbx, lbzux