stwcx.
Store Word Conditional Indexed - 7C 00 00 28
stwcx.
Instruction Syntax
| Mnemonic | Format | Flags |
| stwcx. | rS,rA,rB | Rc = 1 |
Instruction Encoding
0
1
1
1
1
1
S
S
S
S
S
A
A
A
A
A
B
B
B
B
B
1
0
1
0
0
0
0
0
0
1
0
| Field | Bits | Description |
| Primary Opcode | 0-5 | 011111 (0x1F) |
| rS | 6-10 | Source register |
| rA | 11-15 | Base register |
| rB | 16-20 | Index register |
| XO | 21-29 | 168 (0b10101000) |
| Rc | 30-31 | 01 |
Operation
EA ← (rA) + (rB)
if reservation for EA is held then
(EA) ← (rS)
CR0 ← 0b0000 (success)
else
CR0 ← 0b1000 (failure)
endif
The effective address is calculated by adding the base register to the index register. If the reservation for the effective address is held, the word in the source register is stored at the effective address and CR0 is set to indicate success. Otherwise, CR0 is set to indicate failure. This instruction is used for atomic memory operations.
Affected Registers
Condition Register (CR0 field)
- LT (Less Than)
- GT (Greater Than)
- EQ (Equal)
- SO (Summary Overflow)
Memory
- Word at effective address (EA) (if reservation held)
Examples
Basic Store Word Conditional
# Store word conditionally using reservation stwcx. r1, r3, r4 # Store r1 at r3 + r4 if reservation held
Atomic Compare and Swap
# Atomic compare and swap sequence lwarx r5, 0, r3 # Load and reserve cmpw r5, r6 # Compare with expected value bne fail # Branch if not equal stwcx. r7, 0, r3 # Store new value if reservation held bne fail # Branch if store failed # Success