addic.
Add Immediate Carrying and Record - 34 00 00 00
addic.
Instruction Syntax
Mnemonic | Format | Description |
addic. | rD,rA,SIMM | Add immediate carrying and record |
Derived Forms
Mnemonic | Format | Description |
subic. | rD,rA,value | Subtract immediate carrying and record (SIMM = -value) |
Instruction Encoding
0
0
1
1
0
1
D
D
D
D
D
A
A
A
A
A
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
Field | Bits | Description |
Primary Opcode | 0-5 | 001101 (0x0D) |
rD | 6-10 | Destination register |
rA | 11-15 | Source register A |
SIMM | 16-31 | 16-bit signed immediate value |
Operation
rD ← (rA) + EXTS(SIMM)
The sum of the contents of rA and the sign-extended immediate value is placed into rD.
Note: The addic. instruction updates both the carry bit (XER[CA]) and the condition register field CR0.
Affected Registers
Condition Register (CR0 field)
(always)
- LT (Less Than)
- GT (Greater Than)
- EQ (Equal)
- SO (Summary Overflow)
XER (Exception Register)
(always)
- CA (Carry)
For more information on condition codes see Section 2.1.3, "Condition Register," and Section 2.1.5, "XER Register," in the PowerPC Microprocessor Family: The Programming Environments manual.
Examples
Add Immediate with Condition Recording
addic. r3, r1, 100 # r3 = r1 + 100, set carry and CR0 # CR0 will indicate if result is positive, negative, or zero
Compare with Zero Using addic.
addic. r3, r1, 0 # Add 0 to r1, set CR0 based on r1's value # This effectively compares r1 with 0 and sets condition flags
Subtract Immediate with Recording (subic.)
subic. r3, r1, 50 # r3 = r1 - 50, set carry and CR0 # Check both the result and carry flag
Conditional Branching After addic.
addic. r3, r1, -1 # Decrement r1 by 1, update CR0 beq end_loop # Branch if result is zero bgt continue_loop # Branch if result is positive
Multi-Precision with Condition Check
# First operation in multi-precision sequence with condition check addic. r3, r1, 0x8000 # Add immediate, set carry and condition adde r4, r2, r5 # Continue with carry from previous operation