Instruction Syntax

Mnemonic	Format	Flags
mfspr	rD,SPR	None

Instruction Encoding

Field	Bits	Description
Primary Opcode	0-5	011111 (0x1F)
rD	6-10	Destination register
SPR	11-20	Special Purpose Register number
XO	21-30	0101000111 (0x287)
Reserved	31	Should be zero

Operation

rD ← SPR[SPR]

The contents of the specified Special Purpose Register (SPR) are copied to general-purpose register rD. The SPR number identifies which special purpose register to read.

Note: This instruction provides access to various system registers. Common SPR numbers include 8 (LR - Link Register), 9 (CTR - Count Register), and others for processor-specific functionality.

Affected Registers

General Purpose Registers (GPRs)

(always)

• rD - Destination register (loaded with SPR contents)

Special Purpose Registers (SPRs)

(read only)

• SPR - Source Special Purpose Register (read only)

Examples

Read Link Register

# Read current Link Register value
mfspr r3, 8            # Copy LR (SPR 8) to r3
# r3 now contains return address

Read Count Register

# Read current Count Register value
mfspr r4, 9            # Copy CTR (SPR 9) to r4
# r4 now contains loop counter value

Save Return Address

# Save return address before function call
mfspr r5, 8            # Save current LR
bl some_function       # Function call
mtspr 8, r5            # Restore original LR

Loop Counter Management

# Save and restore loop counter
mfspr r6, 9            # Save current CTR
li r7, 100             # Set new counter value
mtspr 9, r7            # Load new value into CTR

# ... perform loop operations ...

mtspr 9, r6            # Restore original CTR

Context Switching

# Save special purpose registers
mfspr r8, 8            # Save LR
mfspr r9, 9            # Save CTR
# ... save other registers ...

bl context_switch      # Switch context

# Restore special purpose registers
mtspr 8, r8            # Restore LR
mtspr 9, r9            # Restore CTR
# ... restore other registers ...

Interrupt Handler

# Interrupt handler entry
interrupt_handler:
    mfspr r10, 8       # Save LR
    mfspr r11, 9       # Save CTR
    # ... handle interrupt ...
    mtspr 8, r10       # Restore LR
    mtspr 9, r11       # Restore CTR
    rfi                # Return from interrupt

Function Prologue

# Function prologue
function_prologue:
    mfspr r12, 8       # Save return address
    stw r12, -4(r1)    # Store on stack
    # ... function code ...
    lwz r12, -4(r1)    # Restore return address
    mtspr 8, r12       # Restore LR
    blr                # Return

Debugging Register State

# Debug special purpose register state
debug_point:
    mfspr r13, 8       # Save LR for debugging
    mfspr r14, 9       # Save CTR for debugging
    # ... perform operations ...
    
    # Debug: check if registers changed unexpectedly
    mfspr r15, 8       # Get current LR
    cmpw r13, r15      # Compare saved vs current LR
    beq lr_ok          # Branch if unchanged
    # Handle unexpected LR change

Loop Optimization

# Optimize loop with CTR
mfspr r16, 9           # Save original CTR
li r17, 1000           # Loop count
mtspr 9, r17           # Set CTR for loop

loop:
    # ... loop body ...
    bdnz loop          # Decrement CTR and branch if non-zero

mtspr 9, r16           # Restore original CTR

System Call Wrapper

# System call wrapper
syscall_wrapper:
    mfspr r18, 8       # Save return address
    # ... prepare system call parameters ...
    sc                 # System call
    mtspr 8, r18       # Restore return address
    blr                # Return to caller

Related Instructions

mtspr, mfcr, mtcrf, mffs