Instruction Syntax

Mnemonic	Format	Flags
mffs	frD	Rc = 0
mffs.	frD	Rc = 1

Instruction Encoding

Field	Bits	Description
Primary Opcode	0-5	111111 (0x3F)
frD	6-10	Destination floating-point register
Reserved	11-15	Should be zero
Reserved	16-20	Should be zero
Reserved	21	Should be zero
XO	22-30	0x1A4 (420) - Extended opcode
Rc	31	Record Condition Register

Operation

frD ← FPSCR

The entire contents of the Floating-Point Status and Control Register (FPSCR) are copied to floating-point register frD. The FPSCR contains 32 bits representing floating-point exception flags, result flags, and control bits.

Note: This instruction provides a way to save the complete state of the FPSCR for later examination or restoration. This is particularly useful for floating-point error handling, context switching, or when complex floating-point operations require preserving status information.

Affected Registers

Floating-Point Register

(always)

• frD - Loaded with complete FPSCR contents

Floating-Point Status and Control Register (FPSCR)

(read only)

• FPSCR - Source register (read only)

Condition Register (CR1)

(if Rc = 1)

• CR1 - Updated with floating-point status

For more information on floating-point status see Section 2.1.4, "Floating-Point Status and Control Register (FPSCR)," in the PowerPC Microprocessor Family: The Programming Environments manual.

Examples

Basic FPSCR Save

# Save complete FPSCR state
mffs f1                 # Copy FPSCR to f1
# ... perform floating-point operations ...
mtfsf 0xFF, f1         # Restore FPSCR from f1

Floating-Point Error Handling

# Save FPSCR before potentially problematic operation
mffs f2                 # Save FPSCR state
fdiv f3, f4, f5        # Perform division (might cause exception)
mffs f6                 # Get current FPSCR
# Compare saved vs current to detect changes

Context Switching

# Save floating-point context
mffs f10                # Save FPSCR
# ... save other floating-point registers ...

bl floating_point_function # Function call

# Restore floating-point context
mtfsf 0xFF, f10        # Restore FPSCR
# ... restore other floating-point registers ...

Exception Flag Examination

# Examine specific exception flags
fadd f1, f2, f3        # Perform floating-point addition
mffs f4                 # Copy FPSCR to f4

# Extract specific exception flags (bit manipulation)
# FPSCR bits can be examined in f4

Floating-Point Status Preservation

# Preserve floating-point status across operations
fadd f1, f2, f3        # Set up floating-point status
mffs f5                 # Save FPSCR

# Perform operations that might modify FPSCR
fsub f6, f7, f8
fmul f9, f10, f11

# Restore original floating-point status
mtfsf 0xFF, f5         # Restore FPSCR

Debugging Floating-Point Operations

# Debug floating-point operation sequence
debug_point:
    mffs f12            # Save FPSCR for debugging
    # ... perform floating-point operations ...
    
    # Debug: check if FPSCR changed unexpectedly
    mffs f13            # Get current FPSCR
    # Compare f12 and f13 to detect changes

Interrupt Handler

# Floating-point interrupt handler
fp_interrupt_handler:
    mffs f20            # Save FPSCR
    # ... handle floating-point interrupt ...
    mtfsf 0xFF, f20    # Restore FPSCR
    rfi                 # Return from interrupt

Multiple Floating-Point Operations

# Track FPSCR across multiple operations
fadd f1, f2, f3        # First operation
mffs f4                 # Save FPSCR after first operation

fmul f5, f6, f7        # Second operation
mffs f8                 # Save FPSCR after second operation

fdiv f9, f10, f11      # Third operation
mffs f12                # Save FPSCR after third operation

# Examine FPSCR state after each operation
# f4, f8, f12 contain FPSCR at different points

Floating-Point Error Recovery

# Save FPSCR before error-prone operation
mffs f14                # Save FPSCR state
fdiv f15, f16, f17     # Potentially problematic division

# Check if error occurred
mffs f18                # Get current FPSCR
# Compare f14 and f18 to detect errors

# Restore original state if needed
mtfsf 0xFF, f14        # Restore original FPSCR

Floating-Point Status Analysis

# Analyze floating-point status bits
fadd f1, f2, f3        # Perform operation
mffs f4                 # Copy FPSCR to f4

# f4 now contains all FPSCR bits including:
# - Exception flags (overflow, underflow, etc.)
# - Result flags (zero, negative, etc.)
# - Control bits (rounding mode, etc.)

# Can be used for detailed floating-point analysis

Related Instructions

mcrfs, mtfsf, mtfsb0, mtfsb1