slw
Shift Left Word - 7C 00 00 30
slw

Instruction Syntax

Mnemonic Format Flags
slw rA,rS,rB Rc = 0
slw. rA,rS,rB Rc = 1

Instruction Encoding

0
1
1
1
1
1
S
S
S
S
S
A
A
A
A
A
B
B
B
B
B
0
0
0
0
0
0
0
0
0
Rc

Field Bits Description
Primary Opcode 0-5 011111 (0x1F)
rS 6-10 Source register
rA 11-15 Destination register
rB 16-20 Shift amount register (low-order 6 bits)
Reserved 21-29 000000000
Rc 30-31 Record Condition Register

Operation

rA ← (rS) << (rB)[26:31]

The source value (rS) is shifted left by the number of positions specified by the low-order 6 bits of (rB). The result is placed into rA.

Note: The shift amount is taken from the low-order 6 bits of rB. If the shift amount is 32 or greater, the result is 0.

Affected Registers

General Purpose Registers (GPRs)

Condition Register (CR0 field)

(if Rc = 1)

Examples

Basic Left Shift

# Shift r1 left by amount in r2
slw r3, r1, r2     # r3 = r1 << (r2 & 0x3F)
slw. r3, r1, r2    # Same as above, but also sets condition register

Multiplication by Power of 2

# Multiply r1 by 2^r2
slw r3, r1, r2     # r3 = r1 * 2^(r2 & 0x3F)

Bit Field Manipulation

# Clear bits 0-3 and shift left by 4
li r2, 4           # Shift amount
slw r3, r1, r2     # r3 = (r1 & 0xFFFFFFF0) << 4

Related Instructions

slwi, srw, sraw, rlwinm

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