stfsx
Store Floating-Point Single Indexed - 7C 00 00 5B
stfsx
Instruction Syntax
Mnemonic | Format | Flags |
stfsx | frS,rA,rB | None |
Instruction Encoding
0
1
1
1
1
1
S
S
S
S
S
A
A
A
A
A
B
B
B
B
B
0
0
0
0
0
0
0
0
0
0
0
Field | Bits | Description |
Primary Opcode | 0-5 | 011111 (0x1F) |
frS | 6-10 | Source floating-point register |
rA | 11-15 | Base register |
rB | 16-20 | Index register |
Reserved | 21-29 | 000000000 |
Reserved | 30-31 | 00 |
Operation
EA ← (rA) + (rB) (EA) ← (frS)[32:63]
The effective address is calculated by adding the base register to the index register. The single-precision floating-point value (high-order 32 bits) of the source register is stored at the effective address.
Note: The stfsx instruction stores a 32-bit single-precision floating-point value to memory using indexed addressing. The address must be aligned to a 4-byte boundary.
Affected Registers
Memory
- Single-precision floating-point value at effective address (EA)
Examples
Basic Store Floating-Point Single Indexed
# Store single-precision value using indexed addressing stfsx fr1, r3, r4 # Store fr1 at address r3 + r4
Array of Singles with Dynamic Index
# Store single in array using dynamic index li r3, array # Load array base address li r4, 8 # Index = 8 (2 * 4 bytes) stfsx fr1, r3, r4 # Store single at array[2]
Dynamic Addressing
# Store single using dynamic index calculation li r3, base_addr # Load base address add r4, r5, r6 # Calculate index dynamically stfsx fr1, r3, r4 # Store single at base_addr + index