sth
Store Halfword - B0 00 00 00
sth
Instruction Syntax
| Mnemonic | Format | Flags |
| sth | rS,d(rA) | None |
Instruction Encoding
1
0
1
1
0
0
S
S
S
S
S
A
A
A
A
A
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
| Field | Bits | Description |
| Primary Opcode | 0-5 | 101100 (0x2C) |
| rS | 6-10 | Source register |
| rA | 11-15 | Base register |
| SIMM | 16-31 | Signed immediate offset |
Operation
EA ← (rA) + SIMM (EA) ← (rS)[16:31]
The effective address is calculated by adding the signed immediate offset to the base register. The least significant halfword (bits 16-31) of the source register is stored at the effective address.
Note: The sth instruction stores a 16-bit halfword to memory. The address must be aligned to a 2-byte boundary.
Affected Registers
Memory
- Halfword at effective address (EA)
Examples
Basic Store Halfword
# Store halfword from r1 to memory sth r1, 0(r3) # Store at address in r3 sth r1, 2(r3) # Store at address r3 + 2
Array of Halfwords
# Store halfword in array li r4, 0 # Array index slwi r4, r4, 1 # Multiply by 2 (halfword size) add r5, r3, r4 # Calculate address sth r1, 0(r5) # Store halfword
Data Structure Access
# Store halfword in data structure li r3, struct_base # Load structure base address li r4, 4 # Offset to field sth r1, 4(r3) # Store halfword at struct.field