rlwimi
Rotate Left Word Immediate then Mask Insert - 50 00 00 00
rlwimi
Instruction Syntax
| Mnemonic | Format | Flags |
| rlwimi | rA,rS,SH,MB,ME | Rc = 0 |
| rlwimi. | rA,rS,SH,MB,ME | Rc = 1 |
Instruction Encoding
0
1
0
1
0
0
S
S
S
S
S
A
A
A
A
A
H
H
H
H
H
B
B
B
B
B
E
E
E
E
E
Rc
| Field | Bits | Description |
| Primary Opcode | 0-5 | 010100 (0x14) |
| rS | 6-10 | Source register |
| rA | 11-15 | Destination register |
| SH | 16-20 | Shift amount (0-31) |
| MB | 21-25 | Mask begin bit (0-31) |
| ME | 26-30 | Mask end bit (0-31) |
| Rc | 31 | Record Condition Register |
Operation
rA ← (rA & ¬MASK) | (ROTATE((rS), SH) & MASK)
The source value (rS) is rotated left by SH positions, then masked with MASK (bits MB to ME). The result is inserted into rA at the masked positions, while preserving the original values in rA at unmasked positions.
Note: MASK is a field mask where bits MB through ME are set to 1, and all other bits are 0.
Affected Registers
General Purpose Registers (GPRs)
- rA (Destination register)
Condition Register (CR0 field)
(if Rc = 1)
- LT (Less Than)
- GT (Greater Than)
- EQ (Equal)
- SO (Summary Overflow)
Examples
Basic Bit Insertion
# Insert bits 8-15 from r1 into bits 16-23 of r2 rlwimi r2, r1, 8, 16, 23
Field Extraction and Insertion
# Extract bits 4-7 from r1 and insert into bits 20-23 of r2 rlwimi r2, r1, 16, 20, 23
Bit Field Manipulation
# Set bits 24-31 of r1 to the value in r2 rlwimi r1, r2, 0, 24, 31