Instruction Syntax

Mnemonic	Format	Flags
sc	None	None

Instruction Encoding

Field	Bits	Description
Primary Opcode	0-5	010001 (0x11)
Reserved	6-10	00000
Reserved	11-15	00000
Reserved	16-20	00000
Reserved	21-29	000000000
LEV	30-31	10 (System call level)

Operation

SRR0 ← PC + 4
SRR1 ← MSR
MSR[PR] ← 1
MSR[EE] ← 0
MSR[IP] ← 0
PC ← 0x00000C00

The current PC is saved in SRR0, the MSR is saved in SRR1, and the processor switches to supervisor mode. The PC is set to the system call handler address.

Note: The sc instruction is used to make system calls from user mode to supervisor mode.

Affected Registers

Machine State Register (MSR)

• PR (Problem State) - Set to 1
• EE (External Interrupt Enable) - Set to 0
• IP (Interrupt Prefix) - Set to 0

Program Counter (PC)

• PC is set to 0x00000C00 (system call handler)

Special Purpose Registers (SPRs)

• SRR0 (Saved Return Register 0) - Contains PC + 4
• SRR1 (Saved Return Register 1) - Contains MSR

Examples

Basic System Call

# Make a system call
li r3, 1          # System call number
li r4, 0          # Parameter 1
li r5, 0          # Parameter 2
sc                 # Execute system call

System Call with Parameters

# Prepare system call parameters
li r3, 4          # write system call
li r4, 1          # file descriptor (stdout)
addis r5, r0, message@ha  # Load message address
addi r5, r5, message@l
li r6, 13         # message length
sc                 # Execute system call

Return from System Call

# After system call returns
# r3 contains return value
# r4 contains error code (if any)
cmpwi r3, 0       # Check for errors
blt error_handler # Branch if error

Related Instructions

rfi, mtmsr, mfmsr