crorc
Condition Register OR with Complement - 4C 00 06 82
crorc
Instruction Syntax
| Mnemonic | Format | Flags |
| crorc | crbD,crbA,crbB | - |
Instruction Encoding
0
1
0
0
1
1
D
D
D
D
D
A
A
A
A
A
B
B
B
B
B
1
1
0
1
0
0
0
0
1
0
0
| Field | Bits | Description |
| Primary Opcode | 0-5 | 010011 (0x13) |
| crbD | 6-10 | Condition Register bit Destination |
| crbA | 11-15 | Condition Register bit A |
| crbB | 16-20 | Condition Register bit B |
| XO | 21-30 | 1101000010 (834) |
| Reserved | 31 | 0 |
Operation
CR[crbD] ← CR[crbA] | ¬CR[crbB]
The condition register OR with complement instruction performs a logical OR operation between condition register bit crbA and the complement (NOT) of condition register bit crbB, and stores the result in condition register bit crbD.
Note: This instruction is useful for testing that either one condition is true OR another is false.
Affected Registers
Condition Register (CR)
(crbD bit only)
- CR[crbD] ← CR[crbA] | ¬CR[crbB]
For more information on condition register operations see Section 2.1.3, "Condition Register," in the PowerPC Microprocessor Family: The Programming Environments manual.
Examples
Basic OR with Complement
# Test: r3 > 0 OR r4 <= 100 cmpwi cr0, r3, 0 # Compare r3 with 0 cmpwi cr1, r4, 100 # Compare r4 with 100 crorc 2, 1, 5 # CR0[EQ] = CR0[GT] | ¬CR1[GT] beq valid_condition # Branch if r3 > 0 OR r4 <= 100
Error Recovery Logic
# Continue if: operation successful OR retry allowed lwz r3, operation_status(r0) lwz r4, retry_count(r0) cmpwi cr0, r3, 1 # Check if operation succeeded cmpwi cr1, r4, 3 # Check if retry limit reached crorc 2, 2, 5 # Success OR retries available beq can_continue # Branch if can continue processing
Complex Condition Logic
# Branch if: value is positive OR flag is not set cmpwi cr0, r3, 0 # Test if value is positive lwz r4, flag_value(r0) cmpwi cr1, r4, 1 # Test if flag is set crorc 2, 1, 6 # Positive OR flag not set beq proceed # Branch if condition met