crxor
Condition Register XOR - 4C 00 03 02
crxor
Instruction Syntax
| Mnemonic | Format | Flags |
| crxor | crbD,crbA,crbB | - |
| crclr | crbD | Simplified (crbD,crbD,crbD) |
Instruction Encoding
0
1
0
0
1
1
D
D
D
D
D
A
A
A
A
A
B
B
B
B
B
0
1
1
0
0
0
0
0
1
0
0
| Field | Bits | Description |
| Primary Opcode | 0-5 | 010011 (0x13) |
| crbD | 6-10 | Condition Register bit Destination |
| crbA | 11-15 | Condition Register bit A |
| crbB | 16-20 | Condition Register bit B |
| XO | 21-30 | 0110000010 (386) |
| Reserved | 31 | 0 |
Operation
CR[crbD] ← CR[crbA] ⊕ CR[crbB]
The condition register XOR instruction performs a logical exclusive OR operation between condition register bits crbA and crbB, and stores the result in condition register bit crbD. The result is 1 if the input bits differ, and 0 if they are the same.
Note: When all three operands are the same (crclr), this clears the bit to 0.
Affected Registers
Condition Register (CR)
(crbD bit only)
- CR[crbD] ← CR[crbA] ⊕ CR[crbB]
For more information on condition register operations see Section 2.1.3, "Condition Register," in the PowerPC Microprocessor Family: The Programming Environments manual.
Examples
Basic XOR Operation
# Test: conditions have different states cmpwi cr0, r3, 0 # Compare r3 with 0 cmpwi cr1, r4, 0 # Compare r4 with 0 crxor 2, 2, 6 # CR0[EQ] = CR0[EQ] ⊕ CR1[EQ] beq different_states # Branch if one zero, one non-zero
Clear Condition Register Bit (crclr)
# Clear CR0[EQ] to 0 (always false condition) crclr 2 # CR0[EQ] = 0 (equivalent to crxor 2,2,2) bne always_branch # This will always branch (since EQ is 0)
Toggle Condition Bit
# Toggle a condition register bit lwz r3, toggle_flag(r0) cmpwi cr1, r3, 1 # Test toggle flag crxor 2, 2, 6 # Toggle CR0[EQ] based on flag
Parity Check
# Check if an even number of conditions are true andi. r3, r5, 0x01 # Test bit 0 andi. r4, r5, 0x02 # Test bit 1 crxor 2, 2, 6 # XOR the condition bits beq even_parity # Branch if even number of bits set
Initialize Condition Bits to False
# Clear multiple condition bits crclr 0 # Clear CR0[LT] = 0 crclr 1 # Clear CR0[GT] = 0 crclr 2 # Clear CR0[EQ] = 0 crclr 3 # Clear CR0[SO] = 0